Bug #27
Tic Timer "CMD" Mode to "OSC" Mode transition delay
Start date:
06/21/2019
Due date:
% Done:
0%
Estimated time:
Description
When LTES is receiving Time Update commands, with no 1 PPS signal, the Tic Timer Mode will become "CMD". However, if the Time Update commands are less frequent than 1 every 2 seconds, Tic Timer Mode will become "OSC". I think that was nominal for EMIRS. But for LTES, requirement "L-TES_ICD-183" states nominal time update interval is every 5 seconds. So I'm thinking the Tic Timer Mode should take longer (6 seconds?) to transition to "OSC" mode.
History
#1 Updated by Greg Mathis over 5 years ago
- Status changed from New to Closed
Fixed with FPGA version 3.12
